The electronics industry continues to rely upon advances in semiconductor technology, including integrated circuits (ICs), to realize higher-functioning devices in more compact areas. For many applications, realizing higher-functioning devices requires integrating a large number of electronic devices into a single silicon die. In addition, many of the individual devices within the die are being manufactured with smaller physical dimensions. As the number of electronic devices per given area of the silicon die increases, and as the size of the individual devices decreases, testing processes become more important and more difficult.
Many integrated circuit dice include circuits having random defects. These defects can recover or fail under particular operating conditions and at higher temperatures. In addition, design faults can be sensitive to such particular operating conditions. Traditionally, isolation of IC faults has been attempted by operating the die in a manner that causes a failure to occur and by attempting to attribute the failure to a malfunctioning circuit element in the IC. One manner in which this has been performed is to operate the die at full speed while applying external heat to the die. Such electrical testing, however, does not always assist in fault isolation because many failure symptoms can manifest themselves in different ways, and malfunctions can result from a variety of different types of defects including defects at non-suspect circuitry locations.
One such testing application that has traditionally been very difficult to accomplish includes physical diagnosis of failing circuit paths in a semiconductor die. Identifying these “critical circuit paths” has been attempted using simulation in conjunction with a thorough understanding of semiconductor die design, followed by verification using physical probing of a suspect circuit. This physical analysis is difficult, however, because it generally requires intimate knowledge of the die design and is particularly difficult for use in analyzing a flip-chip type integrated circuit die. The identification and analysis of critical circuit paths continues to present a challenge to the advancement of the semiconductor industry.